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M54HC165 M74HC165 8 BIT PISO SHIFT REGISTER .HI .LOWPOWERDI .OUTPUTDRI .BALANCEDPROPAGATI .SYMMETRI .HI .WI .PI DESCRIPTION GH SPEED tPD = 15 ns (TYP.) AT VCC = 5 V SSIPATION ICC = 4 A (MAX.) AT TA = 25 C VE CAPABILITY 10 LSTTL LOADS ON DELAYS tPLH = tPHL CAL OUTPUT IMPEDANCE IOL = IOH = 4 mA (MIN.) GH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) DE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V N AND FUNCTION COMPATIBLE WITH 54/74LS165 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC165F1R M74HC165M1R M74HC165B1R M74HC165C1R PIN CONNECTIONS (top view) The M54/74HC165 is a high speed CMOS 8 BIT PISO SHIFT REGISTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. It achives the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. This device contains eight clocked master slave RS flip-flops connected as a shift register, with auxiliary gating to provide over-riding asynchronous parallel entry. Parallel data entres when the shift/load input is low. The parallel data can change while shift/load is low, provided that the recommended set-up and hold times are observed. For clocked operation, shift/load must be high. The two clock input perform identically; one can be used as a clock inhibit by applying a high signal; to permit this operation clocking is accomplished through a 2 input nor gate. To avoid double clocking, however, the inhibit signal should only go high while the clock is high. Otherwise the rising inhibit signal will cause the same response as rising clock edge. All inputs are equipped with protection circuits against static discharge and transient excess voltage. September 1993 NC = No Internal Connection 1/13 M54/M74HC165 INPUT AND OUTPUT EQUIVALENT CIRCUIT TRUTH TABLE INPUTS SHIFT/ CLEAR L H H H H H H X H CLOCK INHIBIT X L L L L H X CLOCK X SERIAL IN X H L H L X X A .........H a............h X X X X X X INTERNAL OUTPUTS QA a H L H L QB b QAn QAn QAn QAn NO CHANGE NO CHANGE OUTPUS QH h QGn QGn QGn QGn a.......h: The level of steady input voltage at inputs a through respectively QAn - QGn : The level of QA -QG, respectively. before the most-recent transition of the clock. LOGIC DIAGRAM 2/13 M54/M74HC165 PIN DESCRIPTION PIN No 1 2 7 9 SYMBOL S/L QH QH CLOCK NAME AND FUNCTION Asynchronous Parallel Load Input Complementary Output Serial Output Clock Input (LOW to HIGH edge triggered) Serial Data Input Parallel Data Inputs IEC LOGIC SYMBOL 10 SI 11, 12, 13, A to H 14, 3, 4, 5, 6 15 CLOCK INH 8 16 GND V CC CLock Inhibit Ground (0V) Positive Supply Voltage ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg TL Parameter Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source Sink Current Per Output Pin DC VCC or Ground Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 25 50 500 (*) -65 to +150 300 Unit V V V mA mA mA mA mW o o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top tr, tf Parameter Supply Voltage Input Voltage Output Voltage Operating Temperature: M54HC Series M74HC Series Input Rise and Fall Time VCC = 2 V VCC = 4.5 V VCC = 6 V Value 2 to 6 0 to VCC 0 to VCC -55 to +125 -40 to +85 0 to 1000 0 to 500 0 to 400 Unit V V V C o C o ns 3/13 M54/M74HC165 DC SPECIFICATIONS Test Conditions Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 V OH High Level Output Voltage 2.0 4.5 6.0 4.5 VOL Low Level Output Voltage 6.0 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 VI = IO=-20 A VIH or V IL IO=-4.0 mA IO=-5.2 mA VI = IO= 20 A VIH or V IL IO= 4.0 mA IO= 5.2 mA VI = VCC or GND VI = VCC or GND 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 0.1 4 TA = 25 oC 54HC and 74HC Min. Typ. Max. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.33 0.33 1 40 Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 1 80 A A V V 1.5 3.15 4.2 0.5 1.35 1.8 V V Unit VIH High Level Input Voltage Low Level Input Voltage V IL 4/13 M54/M74HC165 AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns) Test Conditions Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 7.4 37 44 TA = 25 C 54HC and 74HC Min. Typ. 30 8 7 55 18 15 65 21 18 52 17 14 15 60 71 24 6 5 32 8 7 24 6 5 Max. 75 15 13 150 30 26 165 33 28 135 27 23 6.0 30 35 75 15 13 75 15 13 75 15 13 95 19 16 95 19 16 95 19 16 o Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. 95 19 16 190 38 33 205 41 35 170 34 29 4.8 24 28 110 22 19 110 22 19 110 22 19 Min. Max. 110 22 19 225 45 38 250 50 43 205 41 35 Unit tTLH tTHL tPLH tPHL tPLH tPHL tPLH tPHL fMAX Output Transition Time Propagation Delay Time (CK - QH, QH) Propagation Delay Time (S/L - QH, QH) Propagation Delay Time (H - QH, QH) Maximum Clock Frequency Minimum Pulse Width (CK) Minimum Pulse Width (S/L) Minimum Set-up Time (PI - S/L) (SI - CK) (S/L -CK) Minimum Hold Time (S/L - PI) (CK - SI) (CK - S/L) Minimum Removal Time (CK - CKINH) Input Capacitance Power Dissipation Capacitance ns ns ns ns MHz tW(H) tW(L) tW(L) ns ns ts ns th 2.0 4.5 6.0 0 0 0 0 0 0 0 0 0 ns tREM 2.0 4.5 6.0 20 5 4 5 55 75 15 13 10 95 19 16 10 110 22 19 10 ns pF pF CIN CPD (*) (*) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD *VCC *fIN + ICC 5/13 M54/M74HC165 TIMING CHART 6/13 M54/M74HC165 SWITCHING CHARACTERISTICS TEST WAVEFORM SERIAL MODE PARALLEL MODE PARALLEL MODE PARALLEL MODE PARALLEL MODE 7/13 M54/M74HC165 TEST CIRCUIT ICC (Opr.) INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF SWITCHING CHARACTERISTICS TEST. 8/13 M54/M74HC165 Plastic DIP16 (0.25) MECHANICAL DATA mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX. DIM. P001C 9/13 M54/M74HC165 Ceramic DIP16/1 MECHANICAL DATA mm MIN. A B D E e3 F G H L M N P Q 7.8 2.29 0.4 1.17 0.22 0.51 0.38 17.78 2.79 0.55 1.52 0.31 1.27 10.3 8.05 5.08 0.307 0.090 0.016 0.046 0.009 0.020 3.3 0.015 0.700 0.110 0.022 0.060 0.012 0.050 0.406 0.317 0.200 TYP. MAX. 20 7 0.130 MIN. inch TYP. MAX. 0.787 0.276 DIM. P053D 10/13 M54/M74HC165 SO16 (Narrow) MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8 (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45 (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 P013H 11/13 M54/M74HC165 PLCC20 MECHANICAL DATA mm MIN. A B D d1 d2 E e e3 F G M M1 1.27 1.14 7.37 1.27 5.08 0.38 0.101 0.050 0.045 9.78 8.89 4.2 2.54 0.56 8.38 0.290 0.050 0.200 0.015 0.004 TYP. MAX. 10.03 9.04 4.57 MIN. 0.385 0.350 0.165 0.100 0.022 0.330 inch TYP. MAX. 0.395 0.356 0.180 DIM. P027A 12/13 M54/M74HC165 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. (c) 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 13/13 |
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